1. Technical Field of the Invention
This disclosure relates generally to the routing of signal traces on substrates and more particularly to a method and apparatus for providing improved trace shielding on substrates that consumes less circuit real estate.
2. Description of the Related Art
Crosstalk and electromagnetic interference (EMI) are two issues that every electronic system designer is familiar with. With the growing density and speed (as measured by frequency, i.e. Megahertz) of semiconductor devices and widespread use of such devices in wireless communication devices such as cellular phones and personal digital assistants, it becomes increasingly important to shield the signal traces connected to the semiconductor devices to prevent crosstalk and EMI.
FIG. 1A is a cross-sectional diagram illustrating a conventional two-layer substrate. The substrate 10 includes two metal layers 11 and 13. The upper metal layer 11 typically includes a number of signal traces (not shown) that are connected to a semiconductor die 14 by a jumper wire bond 9. The lower metal layer 13 typically includes a number of metal lands (not shown). Signal vias (not shown) connect the signal traces on the upper metal layer 11 to corresponding metal lands on the lower metal layer 13.
FIG. 1B is a cross-sectional diagram illustrating a conventional four-layer substrate. In addition to the elements illustrated in FIG. 1A, the four-layer substrate has two more metal layers 15 and 17. The metal layers 15 and 17 typically function as power or ground planes.
FIG. 2 is a plan diagram illustrating unshielded signal traces on a conventional substrate 10. In this diagram, the signal traces 20 that are part of the metal layer 11 of FIGS. 1A and 1B are illustrated. A number of signal pads 16 are located on the periphery of the die 14. A number of bond fingers 18 are on the substrate 10 surrounding the die 14, each bond finger 18 corresponding to a signal pad 16. The signal traces 20 are formed in contact with a corresponding bond finger 18, which is electrically connected to a corresponding signal pad 16 by a jumper wire bond 9. In FIG. 2, the substrate 10 is flexible and may be folded about the fold region 12.
FIG. 3 is a plan diagram illustrating shielded signal traces on a conventional substrate. FIG. 3 is the same as FIG. 2, except for the fact that each signal trace is routed between a ground trace 34 and a power trace 24. Each of the ground traces 34 and power traces 24 are connected to a ground via 35 or a power via 25, respectively. If the substrate 10 is a four-layer substrate such as that shown in FIG. 1B, each of the ground vias 35 and power vias 25 are connected to the ground plane and power plane, respectively. If the substrate 10 is a two-layer substrate such as the one shown in FIG. 1A, each of the ground vias 35 and power vias 25 must be connected to a metal land that supplies ground and power voltages, respectively.
The shielding scheme illustrated by FIG. 3 is problematic for a variety of reasons. Due to the increased density of semiconductor devices, routing the ground vias 35 and the power vias 25 in the locations shown is almost impossible for a two-layer substrate, since it does not provide a ground plane like the four-layer substrate does. Additionally, the ground vias 35 and the power vias 25 require a significant amount of surface real estate. The diameter of the vias 24 and 35 is typically on the order of 250 μm, which is significantly larger than the width of the signal traces 20. As a result, when placement is attempted between adjacent traces, the vias 24 and 25 tend to short the signal traces 20, as illustrated in FIG. 3.
Embodiments of the invention address these and other disadvantages of the conventional art.